PRELD, PREST, and PREGO

Name:

PRELD X,$Y,$Z
PREST $X,$Y,$Z
PREGO X,$Y,$Z

Timing:

1υ

Description:

Informs the machine that the content of the memory region from $Y+$Z to X+$Y+$Z will

probably soon be used in a load or store instruction (PRELD),
definitively be written before the next load (PREST), or
probably soon be used as an instruction (PREGO).

PRELD: "preload data"

This instruction has no effect on registers or memory, but it informs the computer that many of the X + 1 bytes M[$Y + $Z] through M[$Y + $Z + X], or M[$Y + Z] through M[$Y + Z + X], will probably be loaded and/or stored in the near future. No protection failure occurs if the memory is not accessible.

PREST: "prestore data"

This instruction has no effect on registers or memory, but it informs the computer that many of the X + 1 bytes M[$Y + $Z] through M[$Y + $Z + X], or M[$Y + Z] through M[$Y + Z + X], will definitely be stored in the near future before they are loaded. (Therefore it is permissible for the machine to ignore the present contents of those bytes. Also, if those bytes are being shared by several processors, the current processor should try to acquire exclusive access.) No protection failure occurs if the memory is not accessible.

PREGO: "prefetch to go"

This instruction has no effect on registers or memory, but it informs the computer that many of the X + 1 bytes M[$Y + $Z] through M[$Y + $Z + X], or M[$Y + Z] through M[$Y + Z + X], will probably be used as instructions in the near future. No protection failure occurs if the memory is not accessible.

PRELD:	"preload data" This instruction has no effect on registers or memory, but it informs the computer that many of the X + 1 bytes M[$Y + $Z] through M[$Y + $Z + X], or M[$Y + Z] through M[$Y + Z + X], will probably be loaded and/or stored in the near future. No protection failure occurs if the memory is not accessible.
PREST:	"prestore data" This instruction has no effect on registers or memory, but it informs the computer that many of the X + 1 bytes M[$Y + $Z] through M[$Y + $Z + X], or M[$Y + Z] through M[$Y + Z + X], will definitely be stored in the near future before they are loaded. (Therefore it is permissible for the machine to ignore the present contents of those bytes. Also, if those bytes are being shared by several processors, the current processor should try to acquire exclusive access.) No protection failure occurs if the memory is not accessible.
PREGO:	"prefetch to go" This instruction has no effect on registers or memory, but it informs the computer that many of the X + 1 bytes M[$Y + $Z] through M[$Y + $Z + X], or M[$Y + Z] through M[$Y + Z + X], will probably be used as instructions in the near future. No protection failure occurs if the memory is not accessible.